Verilog
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swMATH13592MaRDI QIDQ25506FDOQ25506
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Cited In (5)
- Introduction to logic circuits \& logic design with Verilog
- High speed modular systolic array-based DTCWT with parallel processing architecture for 2d image transformation on FPGA
- Theoretical and practical approaches to the denotational semantics for MDESL based on UTP
- Title not available (Why is that?)
- Mechanical approach to linking operational semantics and algebraic semantics for Verilog using Maude
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