The VLSI Complexity of Selected Graph Problems

DOI10.1145/62.70MaRDI QIDQ3768399zbMATH OpenOpenAlexFDO

Authors Joseph Ja'Ja'

Publication date 1984

Published in Journal of the ACM (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1145/62.70

zbMATH Keywords

area-time trade-offsVLSI complexity

Mathematics Subject Classification ID

Analysis of algorithms and problem complexity (68Q25) Graph theory (including graph drawing) in computer science (68R10)

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(11)

• Area-time lower-bound techniques with applications to sorting
• On the VLSI complexity of some arithmetic and numerical problems
• Communication complexity and combinatorial lattice theory
• VLSI routing in polynomial time
• Complexity dichotomy on degree-constrained VLSI layouts with unit-length edges
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• Solving Undirected Graph Problems on VLSI
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• On VLSI layouts of the star graph and related networks
• Connectivity lower bounds in broadcast congested clique
• A framework for solving VLSI graph layout problems

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