Thread-parallel integrated test pattern generator utilizing satisfiability analysis

DOI10.1007/S10766-009-0124-7MaRDI QIDQ987743zbMATH OpenOpenAlexFDO

Authors Alexander Czutro, Ilia Polian, Matthew Lewis, Piet Engelke, Sudhakar M. Reddy, Bernd Becker

Publication date 13 August 2010

Published in International Journal of Parallel Programming (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1007/s10766-009-0124-7

zbMATH Keywords

SAT-based automatic test pattern generationthread-parallel SAT

Mathematics Subject Classification ID

Reliability, testing and fault tolerance of networks and computer systems (68M15)

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Cites work

• scientific article; zbMATH DE number 5620835 (Why is no real title available?)
• scientific article; zbMATH DE number 1235916 (Why is no real title available?)
• scientific article; zbMATH DE number 1330907 (Why is no real title available?)
• A Computing Procedure for Quantification Theory
• An Implicit Enumeration Algorithm to Generate Tests for Combinational Logic Circuits
• Diagnosis of Automata Failures: A Calculus and a Method

Cited in

(6)

• scientific article; zbMATH DE number 2087841 (Why is no real title available?)
• Dependency schemes for DQBF
• The (D)QBF preprocessor HQSpre -- underlying theory and its implementation
• Solving dependency quantified Boolean formulas using quantifier localization
• Preprocessing for DQBF
• High Quality Test Pattern Generation and Boolean Satisfiability

Describes a project that uses

Uses Software

• PaMiraXT
• MPI

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