Upward topological analysis of large circuits using directed graph representation

DOI10.1109/TCS.1984.1085503MaRDI QIDQ3331158zbMATH OpenFDO

Authors Edward Sliwa, Janusz A. Starzyk

Publication date 1984

Published in IEEE Transactions on Circuits and Systems (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1109/TCS.1984.1085503

zbMATH Keywords

directed graphshierarchical decompositionlarge LLS networkslinear stationary circuits

Mathematics Subject Classification ID

Software, source code, etc. for problems pertaining to combinatorics (05-04) Planar graphs; geometric and topological aspects of graph theory (05C10) Directed graphs (digraphs), tournaments (05C20) Software, source code, etc. for problems pertaining to information and communication theory (94-04) Applications of graph theory to circuits and networks (94C15)

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