VLSI Architectures for Soft-Decision Decoding of Reed–Solomon Codes

DOI10.1109/TIT.2010.2095210MaRDI QIDQ5281068zbMATH OpenOpenAlexFDO

Authors Arshad Ahmed, R. Kötter, Naresh R. Shanbhag

Publication date 27 July 2017

Published in IEEE Transactions on Information Theory (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1109/tit.2010.2095210

Mathematics Subject Classification ID

Linear codes (general theory) (94B05) Decoding (94B35)

Cited in

(2)

• Power decoding Reed-Solomon codes up to the Johnson radius
• VLSI architecture and implementation for FS1016 CELP decoder with reduced power and memory requirements

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