VLSI systems for band matrix multiplication

DOI10.1016/0167-8191(87)90024-XMaRDI QIDQ1104700zbMATH OpenFDO

Authors Kam Hoi Cheng, Sartaj Sahni

Publication date 1987

Published in Parallel Computing (Search for Journal in Brave)

zbMATH Keywords

effectivenessdesignsVLSI architecturesband matrix multiplicationnumber of processorsanalysis of performancesbus bandwidthdata movement stepserror diagnosissystolic systems

Mathematics Subject Classification ID

Theory of operating systems (68N25)

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Cited in

(4)

• scientific article; zbMATH DE number 3890726 (Why is no real title available?)
• VLSI implementation of fast solvers for band linear systems with constant coefficient matrix
• Forty-three ways of systolic matrix multiplication
• Designing of processor-time optimal systolic arrays for band matrix-vector multiplication

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