Variable-sized object packing and its applications to instruction cache design

DOI10.1016/J.COMPELECENG.2008.04.002MaRDI QIDQ937463zbMATH OpenOpenAlexFDO

Authors Rung-Bin Lin

Publication date 15 August 2008

Published in Computers and Electrical Engineering (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1016/j.compeleceng.2008.04.002

zbMATH Keywords

Markov chainbin packingstock cuttinginstruction cachepartitions of integer

Mathematics Subject Classification ID

Nonnumerical algorithms (68W05)

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Cited in

(2)

• On the operating unit size of load/store architectures
• Performance evaluation of a decoded instruction cache for variable instruction length computers

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