Verification of Flat FIFO Systems
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- Verification of flat FIFO systems
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- Formal Techniques for Networked and Distributed Systems – FORTE 2004
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- scientific article; zbMATH DE number 2086244
- Verification of concurrent systems with VerCors
Cites work
- scientific article; zbMATH DE number 5286864 (Why is no real title available?)
- scientific article; zbMATH DE number 1232238 (Why is no real title available?)
- scientific article; zbMATH DE number 1796145 (Why is no real title available?)
- A perfect model for bounded verification
- Automated Technology for Verification and Analysis
- Equivalence between model-checking flat counter systems and Presburger arithmetic
- Forward analysis for WSTS. II: Complete WSTS
- How hard is it to verify flat affine counter systems with the finite monoid property?
- Model-Checking Counting Temporal Logics on Flat Structures
- Model-checking \(\mathrm{CTL}^*\) over flat Presburger counter systems
- On Communicating Finite-State Machines
- On the Complexity of Verifying Regular Properties on Flat Counter Systems,
- Safety problems are NP-complete for flat integer programs with octagonal loops
- Structurally cyclic Petri nets
- Symbolic reachability analysis of FIFO-channel systems with nonregular sets of configurations
- Taming past LTL and flat counter systems
- Testing for unboundedness of fifo channels
- Towards a Model-Checker for Counter Systems
- Using forward reachability analysis for verification of lossy channel systems
- Verification of programs with half-duplex communication
- Well-abstracted transition systems: Application to FIFO automata.
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