XMSS and embedded systems. XMSS hardware accelerators for RISC-V

DOI10.1007/978-3-030-38471-5_21MaRDI QIDQ778953zbMATH OpenOpenAlexFDO

Authors W. Wang, Bernhard Jungk, Julian Wälde, Shuwen Deng, Naina Gupta, Jakub Szefer, Ruben Niederhagen

Publication date 21 July 2020

Full work available at URL https://doi.org/10.1007/978-3-030-38471-5_21

zbMATH Keywords

FPGApost-quantum cryptographyhash-based signatureshardware acceleratorRISC-VXMSS

Mathematics Subject Classification ID

Cryptography (94A60) Mathematical problems of computer architecture (68M07) Authentication, digital signatures and secret sharing (94A62)

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Cited in

(4)

• An efficient software implementation of the hash-based signature scheme MSS and its variants
• Faulting Winternitz One-Time Signatures to Forge LMS, XMSS, or $$\text {SPHINCS}^{+}$$ Signatures
• Accelerating SLH-DSA by two orders of magnitude with a single hash unit
• LMS vs XMSS: comparison of stateful hash-based signature schemes on ARM Cortex-M4

Describes a project that uses

Uses Software

• SPHINCS

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