A systolic processor array for the quadrant interlocking elimination method (Q4951741): Difference between revisions
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| Property / author: David J. Evans / rank | |||
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| Property / author: David J. Evans / rank | |||
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| Property / MaRDI profile type: MaRDI publication profile / rank | |||
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| Property / full work available at URL: https://doi.org/10.1080/00207160008804920 / rank | |||
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| Property / OpenAlex ID: W1997249648 / rank | |||
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| Property / cites work: A modification of the quadrant interlocking factorisation parallel method / rank | |||
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| Property / cites work: Q4190126 / rank | |||
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Revision as of 15:51, 29 May 2024
scientific article; zbMATH DE number 1442149
| Language | Label | Description | Also known as |
|---|---|---|---|
| English | A systolic processor array for the quadrant interlocking elimination method |
scientific article; zbMATH DE number 1442149 |
Statements
A systolic processor array for the quadrant interlocking elimination method (English)
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11 March 2001
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systolic processor array
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quadrant interlocking elimination method
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parallel computation
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