Tight chip area lower bounds for discrete Fourier and Walsh-Hadamard transformations (Q1071504): Difference between revisions
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| Property / author: Imrich Vrt'o / rank | |||
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| Property / author: Imrich Vrt'o / rank | |||
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| Property / MaRDI profile type: MaRDI publication profile / rank | |||
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| Property / full work available at URL: https://doi.org/10.1016/0020-0190(85)90092-4 / rank | |||
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| Property / OpenAlex ID: W2002270678 / rank | |||
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| Property / cites work: Q3691061 / rank | |||
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Latest revision as of 13:04, 17 June 2024
scientific article
| Language | Label | Description | Also known as |
|---|---|---|---|
| English | Tight chip area lower bounds for discrete Fourier and Walsh-Hadamard transformations |
scientific article |
Statements
Tight chip area lower bounds for discrete Fourier and Walsh-Hadamard transformations (English)
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1985
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We prove tight linear lower bounds on the area of VLSI circuits for the problems of discrete Fourier and Walsh-Hadamard transformations of n k- bit elements.
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discrete Fourier transform
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discrete Walsh-Hadamard transform
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complexity
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DFT
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DWHT
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VLSI
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area of VLSI circuits
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