A compact DSP core with static floating-point arithmetic (Q2432118): Difference between revisions

From MaRDI portal
Import240304020342 (talk | contribs)
Set profile property.
ReferenceBot (talk | contribs)
Changed an Item
(One intermediate revision by one other user not shown)
Property / full work available at URL
 
Property / full work available at URL: https://doi.org/10.1007/s11265-005-4178-5 / rank
 
Normal rank
Property / OpenAlex ID
 
Property / OpenAlex ID: W2170840568 / rank
 
Normal rank
Property / cites work
 
Property / cites work: Q4779782 / rank
 
Normal rank
Property / cites work
 
Property / cites work: Static Scheduling of Synchronous Data Flow Programs for Digital Signal Processing / rank
 
Normal rank
Property / cites work
 
Property / cites work: Q4343019 / rank
 
Normal rank

Revision as of 21:05, 24 June 2024

scientific article
Language Label Description Also known as
English
A compact DSP core with static floating-point arithmetic
scientific article

    Statements

    A compact DSP core with static floating-point arithmetic (English)
    0 references
    0 references
    0 references
    0 references
    0 references
    0 references
    25 October 2006
    0 references
    signal processing
    0 references

    Identifiers