Evaluation of heuristics for a class-constrained lot-to-order matching problem in semiconductor manufacturing (Q3498894): Difference between revisions
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Property / full work available at URL: https://doi.org/10.1080/00207540601001650 / rank | |||
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Property / cites work: Bin covering algorithms in the second stage of the lot to order matching problem / rank | |||
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Property / cites work: Packing problems / rank | |||
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Property / cites work: A typology of cutting and packing problems / rank | |||
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Property / cites work: Comparison and evaluation of lot-to-order matching policies for a semiconductor assembly and test facility / rank | |||
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Latest revision as of 10:17, 28 June 2024
scientific article
Language | Label | Description | Also known as |
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English | Evaluation of heuristics for a class-constrained lot-to-order matching problem in semiconductor manufacturing |
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Evaluation of heuristics for a class-constrained lot-to-order matching problem in semiconductor manufacturing (English)
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19 May 2008
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semiconductor industry
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heuristics
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packing problems
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