Timed verification of the generic architecture of a memory circuit using parametric timed automata (Q1028737): Difference between revisions

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+Kronos
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+Uppaal
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+MaRDI publication profile
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+W2023122318
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@@ Property / cites work @@
+A theory of timed automata
@@ Property / cites work: A theory of timed automata / rank @@
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+Verification of Asynchronous Circuits using Timed Automata
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+Verification of the Generic Architecture of a Memory Circuit Using Parametric Timed Automata
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+Static Analysis
@@ Property / cites work: Static Analysis / rank @@
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+Uppaal in a nutshell
@@ Property / cites work: Uppaal in a nutshell / rank @@
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+Formal Modeling and Analysis of Timed Systems
@@ Property / cites work: Formal Modeling and Analysis of Timed Systems / rank @@
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+Kronos: A verification tool for real-time systems
@@ Property / cites work: Kronos: A verification tool for real-time systems / rank @@
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+Publication:1028737