Reconciling fault-tolerant distributed computing and systems-on-chip (Q424907): Difference between revisions

@@ Property / Mathematics Subject Classification ID @@
+M14
@@ Property / Mathematics Subject Classification ID: 68M14 / rank @@
+Normal rank
@@ Property / Mathematics Subject Classification ID @@
+M15
@@ Property / Mathematics Subject Classification ID: 68M15 / rank @@
+Normal rank
@@ Property / Mathematics Subject Classification ID @@
+W35
@@ Property / Mathematics Subject Classification ID: 68W35 / rank @@
+Normal rank
@@ Property / zbMATH DE Number @@
+6043226
@@ Property / zbMATH DE Number: 6043226 / rank @@
+Normal rank
@@ Property / zbMATH Keywords @@
+clock synchronization
@@ Property / zbMATH Keywords: clock synchronization / rank @@
+Normal rank
@@ Property / zbMATH Keywords @@
+fault-tolerant distributed systems
@@ Property / zbMATH Keywords: fault-tolerant distributed systems / rank @@
+Normal rank
@@ Property / zbMATH Keywords @@
+modeling approaches
@@ Property / zbMATH Keywords: modeling approaches / rank @@
+Normal rank
@@ Property / zbMATH Keywords @@
+VLSI
@@ Property / zbMATH Keywords: VLSI / rank @@
+Normal rank
@@ Property / describes a project that uses @@
+VINAS-P
@@ Property / describes a project that uses: VINAS-P / rank @@
+Normal rank
@@ Property / MaRDI profile type @@
+MaRDI publication profile
@@ Property / MaRDI profile type: MaRDI publication profile / rank @@
+Normal rank
@@ Property / full work available at URL @@
+https://doi.org/10.1007/s00446-011-0151-7
+Normal rank
@@ Property / OpenAlex ID @@
+W2167308418
@@ Property / OpenAlex ID: W2167308418 / rank @@
+Normal rank
@@ Property / cites work @@
+Optimal Clock Synchronization under Different Delay Assumptions
+Normal rank
@@ Property / cites work @@
+Consensus algorithms with one-bit messages
@@ Property / cites work: Consensus algorithms with one-bit messages / rank @@
+Normal rank
@@ Property / cites work @@
+On the existence of delay-insensitive fair arbiters: Trace theory and its limitations
+Normal rank
@@ Property / cites work @@
+On the possibility and impossibility of achieving clock synchronization
+Normal rank
@@ Property / cites work @@
+A formal approach to designing delay-insensitive circuits
+Normal rank
@@ Property / cites work @@
+Impossibility of distributed consensus with one faulty process
+Normal rank
@@ Property / cites work @@
+Optimal precision in the presence of uncertainty
@@ Property / cites work: Optimal precision in the presence of uncertainty / rank @@
+Normal rank
@@ Property / cites work @@
+Buridan's principle
@@ Property / cites work: Buridan's principle / rank @@
+Normal rank
@@ Property / cites work @@
+Q3126969
@@ Property / cites work: Q3126969 / rank @@
+Normal rank
@@ Property / cites work @@
+General theory of metastable operation
@@ Property / cites work: General theory of metastable operation / rank @@
+Normal rank
@@ Property / cites work @@
+Compiling communicating processes into delay-insensitive VLSI circuits
+Normal rank
@@ Property / cites work @@
+Distributed order scheduling and its application to multi-core dram controllers
+Normal rank
@@ Property / cites work @@
+Optimal and efficient clock synchronization under drifting clocks
+Normal rank
@@ Property / cites work @@
+A theory of clock synchronization (extended abstract)
+Normal rank
@@ Property / cites work @@
+The Theta-Model: achieving synchrony without clocks
+Normal rank
@@ Property / cites work @@
+Q4804897
@@ Property / cites work: Q4804897 / rank @@
+Normal rank
@@ links / mardi / name / links / mardi / name @@
+Publication:424907