Efficient controller synthesis for a fragment of \(\mathrm{MTL}_{0,\infty}\) (Q2249659): Difference between revisions

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Property / OpenAlex ID
 
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Latest revision as of 17:50, 8 July 2024

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Efficient controller synthesis for a fragment of \(\mathrm{MTL}_{0,\infty}\)
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    Efficient controller synthesis for a fragment of \(\mathrm{MTL}_{0,\infty}\) (English)
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    3 July 2014
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