A method for minimization design of two-level-logic networks using multiplexer universal logic modules (Q1322397): Difference between revisions

From MaRDI portal
Importer (talk | contribs)
Created a new Item
 
Set OpenAlex properties.
 
(3 intermediate revisions by 3 users not shown)
Property / MaRDI profile type
 
Property / MaRDI profile type: MaRDI publication profile / rank
 
Normal rank
Property / cites work
 
Property / cites work: ULM Implicants for Minimization of Univers Logic Module Circuits / rank
 
Normal rank
Property / cites work
 
Property / cites work: On the Minimization of Tree-Type Universal Logic Circuits / rank
 
Normal rank
Property / cites work
 
Property / cites work: Modular decomposition of combinatorial multiple-values circuits / rank
 
Normal rank
Property / full work available at URL
 
Property / full work available at URL: https://doi.org/10.1007/bf02939490 / rank
 
Normal rank
Property / OpenAlex ID
 
Property / OpenAlex ID: W2018106661 / rank
 
Normal rank
links / mardi / namelinks / mardi / name
 

Latest revision as of 08:25, 30 July 2024

scientific article
Language Label Description Also known as
English
A method for minimization design of two-level-logic networks using multiplexer universal logic modules
scientific article

    Statements

    A method for minimization design of two-level-logic networks using multiplexer universal logic modules (English)
    0 references
    0 references
    4 July 1994
    0 references
    multiplexer realization
    0 references
    logic design
    0 references
    minimization design
    0 references
    combinational network
    0 references
    combinational functions
    0 references

    Identifiers