Memory power reduction for high-speed implementation of turbo codes (Q1405497): Difference between revisions
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| Property / author: Bruno Bougard / rank | |||
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| Property / author: Liesbet van der Perre / rank | |||
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| Property / author: Veerle Derudder / rank | |||
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| Property / author: Francky V. M. Catthoor / rank | |||
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| Property / author: Bruno Bougard / rank | |||
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| Property / author: Liesbet van der Perre / rank | |||
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| Property / author: Veerle Derudder / rank | |||
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| Property / author: Francky V. M. Catthoor / rank | |||
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| Property / MaRDI profile type: MaRDI publication profile / rank | |||
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| Property / full work available at URL: https://doi.org/10.1023/a:1022132031284 / rank | |||
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| Property / OpenAlex ID: W1604154350 / rank | |||
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Latest revision as of 11:06, 30 July 2024
scientific article
| Language | Label | Description | Also known as |
|---|---|---|---|
| English | Memory power reduction for high-speed implementation of turbo codes |
scientific article |
Statements
Memory power reduction for high-speed implementation of turbo codes (English)
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25 August 2003
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turbo codes
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MAP algorithm
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memory optimization
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low power
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low latency
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