Memory power reduction for high-speed implementation of turbo codes

DOI10.1023/A:1022132031284zbMath1039.68047OpenAlexW1604154350MaRDI QIDQ1405497

A. Giulietti, F. Maessen, Liesbet van der Perre, Bruno Bougard, Veerle Derudder, Francky V. M. Catthoor

Publication date: 25 August 2003

Published in: Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1023/a:1022132031284

zbMATH Keywords

low powermemory optimizationturbo codeslow latencyMAP algorithm

Mathematics Subject Classification ID

Coding and information theory (compaction, compression, models of communication, encoding schemes, etc.) (aspects in computer science) (68P30)

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