An algorithm for generating shift-register cycles (Q1081585): Difference between revisions

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Property / full work available at URL: https://doi.org/10.1016/0304-3975(86)90118-0 / rank
 
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Latest revision as of 15:13, 17 June 2024

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An algorithm for generating shift-register cycles
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    An algorithm for generating shift-register cycles (English)
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    1986
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    This paper deals with an algorithm which, for arbitrary given natural numbers L and n, generates a binary sequence \(S_ L=s_ 0,...,s_{L- 1}\) such that none of its segments of the form \(s_ i,...,s_{i+n-1}\), where \(0\leq i\leq L\) and the subscripts are taken modulo L, appears twice in the sequence. The paper consists of three essential parts: the first one contains a longish explanation of the concept of the algorithm, the second part presents the algorithm, while in the last part its correctness and its time and space complexities are investigated.
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    binary sequence
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