Maximal strips data structure to represent free space on partially reconfigurable FPGAs (Q3399241): Difference between revisions

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Latest revision as of 23:45, 1 July 2024

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Maximal strips data structure to represent free space on partially reconfigurable FPGAs
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    Maximal strips data structure to represent free space on partially reconfigurable FPGAs (English)
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    29 September 2009
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    online scheduling
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    real time
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    reconfigurable architecture
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    task placement
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    free space data structure
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