An even faster systolic array for matrix multiplication (Q1263246): Difference between revisions
From MaRDI portal
Created a new Item |
Added link to MaRDI item. |
||
links / mardi / name | links / mardi / name | ||
Revision as of 10:36, 31 January 2024
scientific article
Language | Label | Description | Also known as |
---|---|---|---|
English | An even faster systolic array for matrix multiplication |
scientific article |
Statements
An even faster systolic array for matrix multiplication (English)
0 references
1989
0 references
The authors present a two-dimensional systolic array implementing Winograd's algorithm for computing the product \(C=A\times B,\) where A and B are two dense matrices of order n. The time unit is defined as the time to perform two additions and a multiplication. The proposed array is composed of 0.5n rows of n cells. The array has 3n I/O ports and the order in which the entries of A and B enter the array alternates. A feedback is used in order to drive the outputs of the last line to the first one. Two stages of the computation are induced by this feedback, in each stage being computed 0.5n\(\times n\) entries of C. It is stated that this array containing 0.5n\(\times n\) cells computes C in 1.5n time units. A comparison (regarding area, time and period) between the proposed architecture and some existing systolic arrays for matrix multiplication is also included. The proposed array dominates from many points of view these arrays. The manner to obtain an efficient VLSI implementation of the array is also discussed.
0 references
matrix multiplication
0 references
complexity
0 references
systolic array
0 references
Winograd's algorithm
0 references
feedback
0 references
VLSI implementation
0 references