Packing directed circuits fractionally (Q1894706): Difference between revisions

A fractional circuit packing of value \(v\) of a directed graph \(G\) is a function that assigns a non-negative rational number \(q(C)\) to each circuit \(C\) such that (i) the sum of \(q(C)\) over all circuits containing any given vertex is at most one, and (ii) the sum of \(q(C)\) over all circuits is \(v\). The author shows that if every fractional circuit packing of \(G\) has value at most \(k\) where \(k\geq 1\), then there exists a set of at most \(4k\log(4k) \log\log_2(4k)\) vertices of \(G\) that meets every circuit.