A single-machine, single-wafer-processing, multiple-lots-per-carrier scheduling problem to minimize the sum of lot completion times (Q1762129): Difference between revisions
From MaRDI portal
Changed an Item |
Changed an Item |
||
Property / describes a project that uses | |||
Property / describes a project that uses: CPLEX / rank | |||
Normal rank |
Revision as of 20:10, 29 February 2024
scientific article
Language | Label | Description | Also known as |
---|---|---|---|
English | A single-machine, single-wafer-processing, multiple-lots-per-carrier scheduling problem to minimize the sum of lot completion times |
scientific article |
Statements
A single-machine, single-wafer-processing, multiple-lots-per-carrier scheduling problem to minimize the sum of lot completion times (English)
0 references
15 November 2012
0 references
single machine
0 references
wafer fabrication
0 references
multiple-lots-per-carrier
0 references
single-wafer-processing
0 references
branch-and-bound
0 references
completion time
0 references
\texttt{CPLEX 12.2}
0 references