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Latest revision as of 15:49, 5 March 2024
scientific article; zbMATH DE number 1227005
| Language | Label | Description | Also known as |
|---|---|---|---|
| English | No label defined |
scientific article; zbMATH DE number 1227005 |
Statements
26 November 1998
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standard delay format
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verilog
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semantics
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Verilog
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logic synthesis
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