High Throughput/Gate AES Hardware Architectures Based on Datapath Compression (Q5125896): Difference between revisions
From MaRDI portal
Added link to MaRDI item. |
Set profile property. |
||
Property / MaRDI profile type | |||
Property / MaRDI profile type: MaRDI publication profile / rank | |||
Normal rank |
Revision as of 18:54, 5 March 2024
scientific article; zbMATH DE number 7254742
Language | Label | Description | Also known as |
---|---|---|---|
English | High Throughput/Gate AES Hardware Architectures Based on Datapath Compression |
scientific article; zbMATH DE number 7254742 |
Statements
High Throughput/Gate AES Hardware Architectures Based on Datapath Compression (English)
0 references
2 October 2020
0 references