Transfer equivalence and realization of nonlinear higher order input-output difference equations (Q5950250): Difference between revisions

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Latest revision as of 21:41, 3 June 2024

scientific article; zbMATH DE number 1679964
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English
Transfer equivalence and realization of nonlinear higher order input-output difference equations
scientific article; zbMATH DE number 1679964

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    Transfer equivalence and realization of nonlinear higher order input-output difference equations (English)
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    13 April 2003
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    The authors consider a discrete-time single-input single-output nonlinear system described by the input-output difference equation \[ y(t+ n) = \phi ( y (t),\dots, y (t +n- 1), u(t),\dots, u (t+s)), \tag{1} \] where \( u \in \mathbb{R} \) is the scalar input variable, \( y \in Y \) is the scalar output variable, \(n\) and \(s\) are nonnegative integers, \(s < n\), and \( \phi \) is a real analytic function defined on \( Y^n \times {\mathbb{R}}^{s+1} \) . Two fundamental modelling problems in nonlinear discrete-time control systems are studied using the language of differential forms. For the first problem a new definition of equivalence is introduced which is based upon the notion of an irreducible differential form of the system and generalizes the notion of transfer equivalence well known for the linear case. The second problem is the realization problem. The input-output (i/o) difference equation is assumed to be in the irreducible form so that one can obtain an accessible and observable realization. Necessary and sufficient conditions are obtained for the existence of a (local) state-space realization of the irreducible i/o difference equation.
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    discrete-time system
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    input-output models
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    equivalence
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    state-space realization
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    linear algebraic methods
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    nonlinear system
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    input-output difference equation
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    irreducible differential form
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    transfer equivalence
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