High density graphs for processor interconnection (Q1153674): Difference between revisions

From MaRDI portal
Set OpenAlex properties.
ReferenceBot (talk | contribs)
Changed an Item
 
Property / cites work
 
Property / cites work: The Indirect Binary n-Cube Microprocessor Array / rank
 
Normal rank
Property / cites work
 
Property / cites work: Parallel concepts in graph theory / rank
 
Normal rank
Property / cites work
 
Property / cites work: On Moore Graphs with Diameters 2 and 3 / rank
 
Normal rank
Property / cites work
 
Property / cites work: On the impossibility of certain Moore graphs / rank
 
Normal rank
Property / cites work
 
Property / cites work: Q5183530 / rank
 
Normal rank
Property / cites work
 
Property / cites work: Q5677530 / rank
 
Normal rank
Property / cites work
 
Property / cites work: A Method of Producing a Boolean Function Having an Arbitrarily Prescribed Prime Implicant Table / rank
 
Normal rank
Property / cites work
 
Property / cites work: On the Equivalence of Finite-State Sequential Machine Models / rank
 
Normal rank
Property / cites work
 
Property / cites work: A Design for (d, k) Graphs / rank
 
Normal rank
Property / cites work
 
Property / cites work: Improved Construction Techniques for (d, k) Graphs / rank
 
Normal rank
Property / cites work
 
Property / cites work: Q5834367 / rank
 
Normal rank
Property / cites work
 
Property / cites work: Design to Minimize Diameter on Building-Block Network / rank
 
Normal rank
Property / cites work
 
Property / cites work: The Design of Small-Diameter Networks by Local Search / rank
 
Normal rank

Latest revision as of 11:34, 13 June 2024

scientific article
Language Label Description Also known as
English
High density graphs for processor interconnection
scientific article

    Statements

    Identifiers