Array resolutions of linear maps (Q1108007): Difference between revisions

From MaRDI portal
Import240304020342 (talk | contribs)
Set profile property.
ReferenceBot (talk | contribs)
Changed an Item
Property / cites work
 
Property / cites work: The Design of Optimal Systolic Arrays / rank
 
Normal rank
Property / cites work
 
Property / cites work: A pipelined tree machine architecture for computing a multidimensional convolution / rank
 
Normal rank
Property / cites work
 
Property / cites work: Pipeline and Parallel-Pipeline FFT Processors for VLSI Implementations / rank
 
Normal rank
Property / cites work
 
Property / cites work: Operator factorization on partially ordered Hilbert resolution spaces / rank
 
Normal rank
Property / cites work
 
Property / cites work: Resolution space, operators and systems / rank
 
Normal rank

Revision as of 17:46, 18 June 2024

scientific article
Language Label Description Also known as
English
Array resolutions of linear maps
scientific article

    Statements

    Array resolutions of linear maps (English)
    0 references
    0 references
    0 references
    1987
    0 references
    The identification of concurrency is a critical factor in the high-speed calculation of algorithms. This study considers maps on X, a discrete resolution space. We establish a resolution on the space of linear maps on X which exhibit compatibility with array processing. Our results are extended to the partially ordered resolution space setting. While on-line array processing motivates our study, the results also suggest efficient processing procedures for off-line applications.
    0 references
    VLSI
    0 references
    concurrency
    0 references
    array processing
    0 references

    Identifiers