Implementation of the AES-128 on Virtex-5 FPGAs (Q3506369): Difference between revisions

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Property / cites work: AES on FPGA from the Fastest to the Smallest / rank
 
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Property / cites work: A Very Compact S-Box for AES / rank
 
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Property / cites work: Cryptographic Hardware and Embedded Systems - CHES 2004 / rank
 
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Property / cites work: Q4797785 / rank
 
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Latest revision as of 11:55, 28 June 2024

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Implementation of the AES-128 on Virtex-5 FPGAs
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