Expressiveness of verifiable hierarchical clock systems (Q3005130): Difference between revisions

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Property / cites work: Model-checking in dense real-time / rank
 
Normal rank
Property / cites work
 
Property / cites work: A theory of timed automata / rank
 
Normal rank
Property / cites work
 
Property / cites work: Discrete Event Simulation of Hybrid Systems / rank
 
Normal rank
Property / cites work
 
Property / cites work: SYSTEM THEORETIC FORMALISMS FOR COMBINED DISCRETE-CONTINUOUS SYSTEM SIMULATION / rank
 
Normal rank
Property / cites work
 
Property / cites work: An environment for DEVS-based multiformalism simulation in common lisp/CLOS / rank
 
Normal rank
Property / cites work
 
Property / cites work: Analysis of timed systems using time-abstracting bisimulations / rank
 
Normal rank
Property / cites work
 
Property / cites work: Q4220896 / rank
 
Normal rank
Property / cites work
 
Property / cites work: Q4122858 / rank
 
Normal rank
Property / cites work
 
Property / cites work: Q3681970 / rank
 
Normal rank
Property / cites work
 
Property / cites work: Q3996495 / rank
 
Normal rank

Latest revision as of 03:55, 4 July 2024

scientific article
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English
Expressiveness of verifiable hierarchical clock systems
scientific article

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    Expressiveness of verifiable hierarchical clock systems (English)
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    7 June 2011
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    general dynamical system
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    hierarchical I/O clock system
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    DEVS
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    timed automata
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    verification
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