Efficient VLSI array processing structures for adaptive quadratic digital filters (Q1102251)

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Efficient VLSI array processing structures for adaptive quadratic digital filters
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    Efficient VLSI array processing structures for adaptive quadratic digital filters (English)
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    The paper develops efficient structures for adaptive quadratic filters based on the LMS algorithm, using the adaptive direct form and the rank compressed LU decomposition method. The structures exhibit high parallelism, as well as modularity and regularity. They have been mapped into VLSI parallel pipeline (PP) and systolic array (SA) processing implementations, and have been evaluated for costs (in bits) and data throughput delay. Implementations have also been compared with direct and truly distributed arithmetic (DA) implementations. It was found out that DA implementation requires less cost and achieves less data throughput delay than the SA processing structure, based on LU decomposition. Generally, a DA structure is more complex in system design than an SA one. Finally, the adaptive quadratic filter structures have been tested for convergence, using two different benchmark examples.
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    adaptive quadratic filters
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    LMS algorithm
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    VLSI parallel pipeline
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    systolic array
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    costs
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    data throughput delay
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