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    Statements

    author
    Janusz A. Brzozowski
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    Carl-Johan H. Seger
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    publication date
    25 June 1992
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    zbMATH Keywords
    MOS switch-level models
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    design methodology
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    asynchronous circuits
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    logic gates
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    bounded-delay models
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    complexity of asynchronous circuit analysis
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    Identifiers

    Mathematics Subject Classification ID
    94C10
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    68Q15
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    94-02
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    zbMATH DE Number
    8771
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