DOI10.1023/A:1024447517501zbMath1065.68120OpenAlexW164873639MaRDI QIDQ1425013
Jürgen Teich, Marcus Bednara
Publication date: 15 March 2004 Published in: The Journal of Supercomputing (Search for Journal in Brave) Full work available at URL: https://doi.org/10.1023/a:1024447517501
zbMATH Keywords
FPGAdesign automationspace-time mappingregular processor arrays
Mathematics Subject Classification ID
Hardware implementations of nonnumerical algorithms (VLSI algorithms, etc.) (68W35)