New design of reversible full adder/subtractor using \(R\) gate

DOI10.1007/S10773-018-3921-1zbMath1489.68033arXiv1708.00306OpenAlexW3105953214MaRDI QIDQ1740954

Rasha Montaser, Mahmoud Abdel-Aty, Ahmed Younes

Publication date: 3 May 2019

Published in: International Journal of Theoretical Physics (Search for Journal in Brave)

Full work available at URL: https://arxiv.org/abs/1708.00306

zbMATH Keywords

arithmetic unitreversible gatesquantum processorsreversible adderreversible subtractor

Mathematics Subject Classification ID

Mathematical problems of computer architecture (68M07) Quantum gates (81P65)

Related Items (5)

An optimized quantum circuit for converting from sign-magnitude to two's complement ⋮ Quantum adder for superposition states ⋮ Quantum matrix multiplier ⋮ An improved design of \(n\)-bit universal reversible gate library ⋮ T-count optimized quantum circuit for floating point addition and multiplication

Uses Software

• NFFr

Cites Work

• Unnamed Item
• Synthesis of reversible circuits with minimal costs
• Conservative logic
• Improving the quantum cost of NCT-based reversible circuit
• Mapping of Subtractor and Adder-Subtractor Circuits on Reversible Quantum Gates
• Quantum Computation and Quantum Information
• Reversible Computing

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