T-count optimized quantum circuit for floating point addition and multiplication
From MaRDI portal
Publication:2099611
DOI10.1007/s11128-021-03296-6OpenAlexW3212814544WikidataQ114223666 ScholiaQ114223666MaRDI QIDQ2099611
Publication date: 24 November 2022
Published in: Quantum Information Processing (Search for Journal in Brave)
Full work available at URL: https://doi.org/10.1007/s11128-021-03296-6
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- Guide to FPGA implementation of arithmetic functions
- Quantum key distribution protocol based on modified generalization of Deutsch-Jozsa algorithm in \(d\)-level quantum system
- New design of reversible full adder/subtractor using \(R\) gate
- Quantum circuits for floating-point arithmetic
- Novel multi-bit quantum comparators and their application in image binarization
- Cost-efficient design of a quantum multiplier-accumulator unit
- An algorithm to solve integer linear systems exactly using numerical methods
- Cryptanalysis and improvement in semi-quantum private comparison based on Bell states
- Quantum Computation and Quantum Information
- Mapping NCV Circuits to Optimized Clifford+T Circuits
- Of What Use Is Floating-Point Arithmetic in Computational Geometry?
- Quantum cryptography without Bell’s theorem
- Improved Quantum Circuits for Elliptic Curve Discrete Logarithms
- Quantum Circuit Design of a T-count Optimized Integer Multiplier
- Lectures on quantum geometry
