Quantum Circuit Design of a T-count Optimized Integer Multiplier

DOI10.1109/TC.2018.2882774MaRDI QIDQ5228944zbMATH OpenOpenAlexWikidataFDO

Authors Edgard Muñoz-Coreas, Himanshu Thapliyal

Publication date 13 August 2019

Published in IEEE Transactions on Computers (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1109/tc.2018.2882774

Mathematics Subject Classification ID

Computer science (68-XX)

Cited in

(10)

• T-count optimized Wallace tree integer multiplier for quantum computing
• T-count optimized quantum circuit for floating point addition and multiplication
• Fast Swapping in a Quantum Multiplier Modelled as a Queuing Network
• Quantum circuit design for objective function maximization in gate-model quantum computers
• Asymmetric scaling of a quantum image based on bilinear interpolation with arbitrary scaling ratio
• Improving the implementation of quantum blockchain based on hypergraphs
• Deterministic algorithms for compiling quantum circuits with recurrent patterns
• Quantum circuits design for evaluating transcendental functions based on a function-value binary expansion method
• A novel and efficient square root computation quantum circuit for floating-point standard
• Quantum algorithms for numerical differentiation of expected values with respect to parameters

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