Dynamically Restructurable Fault-Tolerant Processor Network Architectures
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Publication:3347791
DOI10.1109/TC.1985.1676583zbMath0558.94019MaRDI QIDQ3347791
Publication date: 1985
Published in: IEEE Transactions on Computers (Search for Journal in Brave)
Full work available at URL: https://doi.org/10.1109/tc.1985.1676583
binary tree; modular network; distributed system; circuit switching; parallel system; packet switching; dynamic processing; fault- tolerant multiprocessor networks; self-routing
94C15: Applications of graph theory to circuits and networks
68N25: Theory of operating systems
68N99: Theory of software
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