Dhiraj K. Pradhan

Available identifiers

zbMath Open pradhan.dhiraj-kMaRDI QIDQ3181586

List of research outcomes

Publication	Date of Publication	Type
A Graph-Based Unified Technique for Computing and Representing Coefficients over Finite Fields	2018-06-12	Paper
A Technique for Representing Multiple Output Binary Functions with Applications to Verification and Simulation	2018-06-12	Paper
A Defect Tolerance Scheme for Nanotechnology Circuits	2017-11-20	Paper
https://portal.mardi4nfdi.de/entity/Q3574330	2010-07-09	Paper
https://portal.mardi4nfdi.de/entity/Q3181587	2009-10-12	Paper
On the Design and Optimization of a Quantum Polynomial-Time Attack on Elliptic Curve Cryptography	2009-01-13	Paper
Theory and Applications of Satisfiability Testing	2005-12-16	Paper
The effect of program behavior on fault observability	1996-01-01	Paper
Utilization of on-line (concurrent) checkers during built-in self-test and vice versa	1996-01-01	Paper
A fault tolerant hybrid memory structure and memory management algorithms	1995-01-01	Paper
The effect of memory-management policies on system reliability	1994-03-13	Paper
A new algorithm for order statistic and sorting	1994-02-07	Paper
Roll-forward checkpointing scheme: a novel fault-tolerant architecture	1994-01-01	Paper
Communication structures in fault‐tolerant distributed systems	1993-08-23	Paper
https://portal.mardi4nfdi.de/entity/Q4035366	1993-05-18	Paper
A new class of bit- and byte-error control codes	1992-10-12	Paper
The de Bruijn multiprocessor network: a versatile parallel processing and sorting network for VLSI	1989-01-01	Paper
Fault-Tolerant Multiprocessor Link and Bus Network Architectures	1985-01-01	Paper
Dynamically Restructurable Fault-Tolerant Processor Network Architectures	1985-01-01	Paper
Sequential Network Design Using Extra Inputs for Fault Detection	1983-01-01	Paper
A Fault-Tolerant Communication Architecture for Distributed Systems	1982-01-01	Paper
Undetectability of Bridging Faults and Validity of Stuck-At Fault Test Sets	1980-01-01	Paper
A New Class of Error-Correcting/Detecting Codes for Fault-Tolerant Computer Applications	1980-01-01	Paper
A Uniform Representation of Single-and Multistage Interconnection Networks Used in SIMD Machines	1980-01-01	Paper
A Theory of Galois Switching Functions	1978-01-01	Paper
Universal Test Sets for Multiple Fault Detection in AND-EXOR Arrays	1978-01-01	Paper
Asynchronous State Assignments with Unateness Properties and Fault-Secure Design	1978-01-01	Paper
Fault-Tolerant Asynchronous Networks Using Read-Only Memories	1978-01-01	Paper
Techniques to Construct (2,1) Separating Systems from Linear Error-Correcting Codes	1976-01-01	Paper
Reed-Muller Like Canonic Forms for Multivalued Functions	1975-01-01	Paper
Fault-Tolerant Carry-Save Adders	1974-01-01	Paper
Design of Two-Level Fault-Tolerant Networks	1974-01-01	Paper
https://portal.mardi4nfdi.de/entity/Q4132436	1973-01-01	Paper
Fault-Tolerant Asynchronous Networks	1973-01-01	Paper
Error-Control Techniques for Logic Processors	1972-01-01	Paper

Research outcomes over time

Doctoral students

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Known relations from the MaRDI Knowledge Graph

Property	Value
MaRDI profile type	MaRDI person profile
instance of	human

This page was built for person: Dhiraj K. Pradhan