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scientific article; zbMATH DE number 1227005
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scientific article; zbMATH DE number 1227005

    Statements

    author
    Vivek Sagdeo
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    publication date
    26 November 1998
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    Mathematics Subject Classification ID
    68N15
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    68Q55
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    68-01
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    68-04
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    94C30
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    zbMATH DE Number
    1227005
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    zbMATH Keywords
    standard delay format
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    verilog
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    semantics
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    Verilog
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    logic synthesis
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