Chai-Tea, Cryptographic Hardware Implementations of xTEA

DOI10.1007/978-3-540-89754-5_28zbMath1203.94105OpenAlexW1487782177MaRDI QIDQ5504636

Jens-Peter Kaps

Publication date: 22 January 2009

Published in: Progress in Cryptology - INDOCRYPT 2008 (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1007/978-3-540-89754-5_28

zbMATH Keywords

FPGAefficient implementationASICTEAXTEAsymmetric key algorithms

Mathematics Subject Classification ID

Cryptography (94A60)

Related Items (4)

A Flexible and Compact Hardware Architecture for the SIMON Block Cipher ⋮ Quest for a universal density functional: the accuracy of density functionals across a broad spectrum of databases in chemistry and physics ⋮ Improved differential attack on round-reduced LEA ⋮ Meet-in-the-Middle Attacks on Reduced-Round XTEA

Uses Software

• PRESENT
• Camellia
• eSTREAM
• TEA
• XTEA

Cites Work

• Unnamed Item
• Unnamed Item
• New results on the genetic cryptanalysis of TEA and reduced-round versions of XTEA
• Camellia: A 128-Bit Block Cipher Suitable for Multiple Platforms — Design andAnalysis
• AES on FPGA from the Fastest to the Smallest
• New Lightweight DES Variants
• PRESENT: An Ultra-Lightweight Block Cipher
• A Regular Layout for Parallel Adders
• Cryptographic Hardware and Embedded Systems - CHES 2004

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