Routing in VLSI-layout (Q1179413)

From MaRDI portal
Revision as of 10:36, 30 July 2024 by Openalex240730090724 (talk | contribs) (Set OpenAlex properties.)
(diff) ← Older revision | Latest revision (diff) | Newer revision → (diff)
scientific article
Language Label Description Also known as
English
Routing in VLSI-layout
scientific article

    Statements

    title
    Routing in VLSI-layout (English)
    0 references
    author
    B. Froleyks
    0 references
    Bernhard Korte
    0 references
    Hans Jürgen Prömel
    0 references
    publication date
    26 June 1992
    0 references
    zbMATH Keywords
    VLSI-logic-chips
    0 references
    combinatorial optimization techniques
    0 references

    Identifiers

    DOI
    10.1007/BF02080203
    0 references
    Mathematics Subject Classification ID
    68R05
    0 references
    68W35
    0 references
    94C15
    0 references
    zbMATH DE Number
    24572
    0 references
    OpenAlex ID
    W2004219466
    0 references
     
    Retrieved from "https://portal.mardi4nfdi.de/w/index.php?title=Item:Q1179413&oldid=37311399"
    Powered by MediaWiki