A Two's Complement Parallel Array Multiplication Algorithm
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(10)- A concurrent system for the computation of higher-order moments
- Parallel algorithms for addition and multiplication on processor arrays with reconfigurable bus systems
- Cost-efficient design of a quantum multiplier-accumulator unit
- An efficient universal addition scheme for all hybrid-redundant representations with weighted bit-set encoding
- Modular multiplication using the core function in the residue number system
- An optimized quantum circuit for converting from sign-magnitude to two's complement
- GENERAL COST FACTORS FOR MULTIPLE‐VALUED LOGIC DESIGN OF ARITHMETIC UNITS
- Quantum circuit designs of efficient squaring
- Efficient realization of large size two's complement multipliers using embedded blocks in FPGAs
- VLSI implementation of area-efficient truncated modified booth multiplier for signal processing applications
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