A discrete formalization of switch-level circuit behavior

DOI10.1016/0167-9260(95)00023-2MaRDI QIDQ3122484zbMATH OpenOpenAlexFDO

Authors Wilbert Körver

Publication date 27 February 1997

Published in Integration (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1016/0167-9260(95)00023-2

zbMATH Keywords

CMOS transistor networksDiscrete switch-level modelsFunctional behavior of transistor networksLogic delays

Mathematics Subject Classification ID

Fault detection; testing in circuits and networks (94C12)

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• Simulation and Implication Using a Transfer Function Model for Switching Logic
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