scientific article; zbMATH DE number 3959288

zbMATH Open0595.94021MaRDI QIDQ3727872FDOQ3727872

Michael Yoeli, Janusz Brzozowski

Publication date: 1986

Title of this publication is not available (Why is that?)

zbMATH Keywords

cascade connectionsswitch-level models for static combinational CMOS networkstransmission gates

Mathematics Subject Classification ID

Graph theory (including graph drawing) in computer science (68R10) Applications of graph theory to circuits and networks (94C15)

Cited In (6)

• On equations for regular languages, finite automata, and sequential networks
• A theory for the derivation of combination C-mos circuit designs
• An optimistic ternary simulation of gate races
• Transistor chaining in static CMOS functional cells of arbitrary planar topology
• Title not available (Why is that?)
• A discrete formalization of switch-level circuit behavior

   Recommendations

• A discrete formalization of switch-level circuit behavior 👍 👎
• Title not available (Why is that?) 👍 👎
• Title not available (Why is that?) 👍 👎
• Title not available (Why is that?) 👍 👎
• Transistor chaining in static CMOS functional cells of arbitrary planar topology 👍 👎

This page was built for publication:

Report a bug (only for logged in users!)Click here to report a bug for this page (MaRDI item Q3727872)