Combinatorial cell design for CMOS libraries

DOI10.1016/S0167-9260(99)00024-3MaRDI QIDQ4955657zbMATH OpenOpenAlexFDO

Authors

Publication date 4 June 2000

Published in Integration (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1016/s0167-9260(99)00024-3

zbMATH Keywords

delay-matchsize-match

Mathematics Subject Classification ID

Hardware implementations of nonnumerical algorithms (VLSI algorithms, etc.) (68W35)

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Cited in

(5)

• Transistor chaining in static CMOS functional cells of arbitrary planar topology
• An evaluation of the equivalent inverter modeling approach
• Cell selection from technology libraries for minimizing power
• On the geometrical optimization of CMOS Hall cells, rectangular and square
• A theory for the derivation of combination C-mos circuit designs

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