A general hardware design model for multicontext FPGAs

DOI10.1007/3-540-46117-5_106MaRDI QIDQ4408251zbMATH OpenFDO

Authors Naoto Kaneko, Hideharu Amano

Publication date 29 June 2003

Published in Lecture Notes in Computer Science (Search for Journal in Brave)

Full work available at URL http://link.springer.de/link/service/series/0558/bibs/2438/24381037.htm

Mathematics Subject Classification ID

Computing methodologies and applications (68U99)

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Cited in

(1)

• Dynamic reconfiguration architectures for multi-context FPGAs

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