A hardware random number generator

DOI10.1007/3-540-36400-5_32MaRDI QIDQ4425730zbMATH OpenFDO

Authors Thomas E. Tkacik

Publication date 11 September 2003

Published in Lecture Notes in Computer Science (Search for Journal in Brave)

Full work available at URL http://link.springer.de/link/service/series/0558/bibs/2523/25230450.htm

Mathematics Subject Classification ID

Random number generation in numerical analysis (65C10) Cryptography (94A60)

Recommendations

• A design of reliable true random number generator for cryptographic applications
• How to predict the output of a hardware random number generator.
• scientific article; zbMATH DE number 3844905
• A hybrid random number generator (HRNG)
• Generating and testing cryptographically secure random numbers

Cited in

(7)

• Random number generators for large-scale parallel Monte Carlo simulations on FPGA
• Survey on hardware implementation of random number generators on FPGA: theory and experimental analyses
• A design of reliable true random number generator for cryptographic applications
• ASIC implementation of a nonlinear dynamical model for hippocampal prosthesis
• How to predict the output of a hardware random number generator.
• A multiplicative random number generator.
• Current tendencies in free-running oscillators: a review

This page was built for publication: A hardware random number generator

Report a bug (only for logged in users!)Click here to report a bug for this page (MaRDI item Q4425730)