A loop-based apparatus for at-speed self-testing

DOI10.1007/BF02943206MaRDI QIDQ5942702zbMATH OpenOpenAlexFDO

Authors Xiaowei Li, Paul Y. S. Cheung

Publication date 9 September 2001

Published in Journal of Computer Science and Technology (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1007/bf02943206

zbMATH Keywords

BIST scheme

Mathematics Subject Classification ID

Reliability, testing and fault tolerance of networks and computer systems (68M15)

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(3)

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• BIST for systems-on-a-chip
• Self-Testing without the Generator Bottleneck

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