A parallel VLSI video/communication controller

DOI10.1023/A:1011121709723MaRDI QIDQ5947748zbMATH OpenOpenAlexFDO

Authors Gr. Doumenis, G. Konstantoulakis, G. Korinthios, G. Lykakis, D. Reisis, G. Synnefakis

Publication date 18 June 2002

Published in Journal of VLSI signal processing systems for signal, image and video technology (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1023/a:1011121709723

zbMATH Keywords

video communicationVLSI architecture

Mathematics Subject Classification ID

Computer system organization (68M99)

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• Architecture of an image rendering Co-processor for MPEG-4 visual compositing
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